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System Verilog Jobs
ASIC Verification Engineer
Client of MBR Partners
- 7 - 10 Years
- Dubai - United Arab Emirates
Collaborate with teams to ensure silicon success, develop verification plans, and utilize UVM environments for ASIC verification with strong scripting skills.
2 DecSenior Design Verification Engineer
EXALT Technologies
- 3 - 8 Years
- Egypt - Egypt
Lead verification strategy, develop UVM testbenches, and automate processes using Python, requiring strong SystemVerilog skills and digital design knowledge.
8 DecGet Personalised Jobs Recommendations
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