System Verilog Jobs

• 5 - 8 Years
• Abu Dhabi - United Arab Emirates (UAE)

Conduct functional, integration, regression, and user acceptance testing while managing defects and supporting production readiness in banking applications.

• 5 - 8 Years
• Abu Dhabi - United Arab Emirates (UAE)

Conduct functional, integration, regression, and user acceptance testing while managing defects and ensuring release readiness in banking applications.

• 0 - 2 Years
• Cairo - Egypt

Contribute to engineering projects while learning digital verification, Verilog, System Verilog, UVM methodology, and Unix/Linux skills in a collaborative environment.

• 0 - 5 Years
• Cairo - Egypt

Develop and execute verification plans, design co-emulation environments, and mentor engineers with expertise in SystemVerilog and UVM.

• 7 - 12 Years
• Cairo - Egypt

Responsible for RTL design from architecture to tapeout, requiring strong Verilog skills, microarchitecture experience, and knowledge of synthesis tools.

• 6 - 11 Years
• Cairo - Egypt

Lead functional verification on ASIC projects, architect testbenches, ensure quality, and require expertise in UVM, SystemVerilog, and verification tools.

• 7 - 14 Years
• Dubai - United Arab Emirates (UAE)

Conduct quality control checks and inspections on materials and products, requiring expertise in software testing and relevant engineering experience.

• 4 - 7 Years
• Sharjah - United Arab Emirates (UAE)

Prepare test strategies, perform functional and API testing, validate invoice lifecycles, and require strong skills in SQL and test automation.