VLSI Design Jobs

• 5 - 10 Years
• Cairo - Egypt

Develop and verify complex ASICs using System Verilog and UVM, collaborating with design teams and enhancing verification infrastructure.

• 2 - 7 Years
• Egypt - Egypt

Develop and upgrade test benches for ASIC verification, collaborating with teams, and requiring proficiency in System Verilog, UVM, and debugging skills.

• 10 - 15 Years
• Cairo - Egypt

Lead end-to-end verification strategy for complex designs, utilizing UVM methodology, System Verilog, and automation scripting, with strong simulation and debugging skills.